In this position, you will be responsible for server/SOC/ASIC product test development. Your responsibilities will include but not be limited to:
？ Collaborating with design and product development engineers to deliver Design-for-Test (DFT) solutions;
？ Participating in DFT development like DFT architecture definition and test plans definition;
？ Responsible for Verilog* and/or VHDL test bench creation and/or debug, test writing, Register Transfer Level (RTL) simulation, Gate Level Simulation (GLS), analog simulation, performance validation, VTPSim* (Verilog* test pattern simulator), silicon debug on tester (or on other platform like system level);
？ Developing highly optimized test vectors by using state-of-the-art vector conversion tool and methods;
？ Developing, integrating and optimizing test program through characterization and other techniques;
？ Developing or designing test hardware (for example test interface unit/load board);
？ Managing silicon debug to check out all the structural and functional tests;
？ Qualifying new products and performing detailed test program analysis to ensure product startup with low Defect per Million (DPM), low test time, good yield and meeting other product health indicators before passing over to factory product engineering group for high volume manufacturing.

Qualification:

？ Bachelor or Master in Electrical, Electronics, Microelectronics or Computer Engineering;
？ Fluent in English speaking and writing is a basic requirement;
？ Familiar with Automated Test Equipment (ATE) applications, e.g., Advantest T2k, Agilent 93K, Teradyne etc;
？ Experienced in wafer sort or final test Test Program development;
？ Familiar with Digital, Mixed Signal test, or Analog test methodologies;
？ Experience in structural test techniques (SCAN, MBIST, JTAG etc), standard IOs (PCIE, USB, SERDES, DDR) and circuit blocks (Memory, Clocks, CPU) is preferred;
？ Knowledge in Python*, C++*, Perl*, VHDL*, Verilog*, digital logic, CMOS and hardware design is preferred;
？ Experience of full ownership and work independently on 1+ full product cycle is highly preferred;
？ Proven good issue debugging and problem solving skills;
？ The candidates can be considered if he/she has experiences in production Product Engineering or test hardware maintenance and is willing to purse technical career path in product development engineering.

上班地址：闵行区紫星路880号