ESIP (Ethernet SerDes IP department) is looking for a Pre-Silicon Verification Engineer.

About us:

ESIP develops and delivers High Speed networking and communication IPs (such as Ethernet PHY, PCIE, USB-TypeC, DP/HDMI) to all Intel devices (Client and Servers CPU’s / Chipset / Controllers).

Team delivers state of the art analog PHYs (receivers and transmitters) circuits for the most advanced standards like 112Gb/s and higher Ethernet PHY in Intel/TSMC process (14nm/10nm/7nm/5nm).

About you:
In this role you will deal with all the verification phases along the project, from learning the specs and the design, defining environment and test plan, implementing the environment and run and amp debug simulations.

#IPG_IL

Qualifications

BSc or MSc in Electrical Engineering or Software Engineering
Experience in Pre-Silicon verification
Knowledge in System-Verilog
Knowledge in OVM/UVM methodology
Knowledge in digital PHY- advantage.
Creativity and team work.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.