Description:

? Work with the global design teams to do complex SOC verification for digital/analog design.

? block level verification based on SystemVerilog&UVM methodology for the complex new IP design.

? Responsible for verification plan quality, verification result/design target cross-check, test case development to have better coverage and verification quality. Co-work with functional verification team to ensure the complex SoC verification functional coverage and quality

Requirements:

? Bachelor or master’s degree in Microelectronics, Electronics, Electronic Engineering, Computer Science or relevant disciplines

? Good knowledge and experience in C/C++/Verilog/System Verilog/UVM programming languages, familiar with IC simulation&debug flow and tools,testbench build, unix/linux environment, tcl/perl script etc.

? Good Knowledge of computer architecture, especially ARM CPU(Cortex A/M series), bus protocols(APB/AHB/AXI), verification experience of ARM-based SoC is a plus