Layout Engineer(上海)
台积电有限公司ShanghaiUpdate time: August 26,2019
Job Description

岗位介绍
1.Work on SRAM/Flash/IO/standard cell layout design & verification.
2.Work on test chip layout design & verification.
在这个领域发光发热,要具备:
1.At least BS Degree of Microelectronics.
2.Familiar with layout design and verification tool (Virtuoso, Laker, Calibre ...)
3.Good English oral and written skills.
4.Good communication and teamwork.
5.Programming skill and APR test chip experience will be plus factor (Perl, TCL, C++)

职能类别: 大学/大专应届毕业生

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