Responsibilities

As a High speed IO Circuit Design Engineer, you will be responsible for using the state of art technology to design and verify analog/Mix signal circuitry used in advanced memory products. You will work with different groups such as Product Engineering, Process integration, Assembly etc to design advanced memory products. You will be challenged by the complexity and difficulty of designing and verifying the advanced memory chip with high speed, complicated functionality, advanced low power and power management technology.

1-Design/verify/optimize high speed IO circuit blocks used in memory products, DDR4, DDR5, LPDDR4, LPDDR5, GDDR5, GDDR6 etc;

2-Developing advanced (sub-10ps) SerDes - advance PHY architectures, with emphasis on high-speed receivers and signal-conditioning/equalization techniques;

3-Modeling and simulations of advance analog systems, algorithm development, as well as mixed-signal system integration, bring-up and debug;

4-Work with design team, Plan/implement/verify the whole analog circuit system;

5-Design the circuity used for test, main focus on analog block but not limited;

6-Guide layout designer floorplan/implement the layout and response post layout simulation;

7- Provide support to Product Engineering for silicon test/debug;

8-Pre-research the advanced high speed IO technology used in the next generation of DRAM.

Requirements

1-Good known and deep understanding device physics and basic Nano-meter CMOS process;

2-At least 7 years of high-speed analog systems experience - 16Gbps+ designs, High-Frequency N/Frac-N PLLs, Radio Frequency Circuits, etc. is acceptable;

3-Experience with analog system modeling and analysis using MATLAB; also, knowledgeable with C/C++, Python and running Debugger;

4-Familiar with EDA design tools such as Spectre/hspice, finesim/hsim, Virtuoso, StarRC etc;

5-Strong background in Communication Theory, and corresponding DSP concepts and techniques in DFE, FEC, SNR, Frequency/Time-Domain analysis (FFT, Matrix Algebra, Fixed-Point);

6-Knowledgeable in high-frequency design methods and measurements - S-parameter, TDR, etc;

7-Background in IBIS-AMI (also, prefer some experience with Verilog/RTL);

8-Good team player and communication skills;

9-Good learning competency, self-motivated in a flexible and dynamic environment.

Education (One of the following is required)

1-A Bachelor in Electrical Engineering or related discipline pulse 8 years of experience;

2-A Master in Electrical Engineering or related discipline pulse 6 years of experience.

上班地址：睿力集成电路有限公司