• Understand the architecture of the graphics IP and functional block being designed
• Build C/C++ model for simulation
• Build test bench and monitors for DUT
• Compose test plan and validation vectors to ensure functional completeness
• Debug function/performance bugs of graphics IP
• Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation

• Have in depth knowledge of entire design process from Design specification, defining architecture, micro-architecture, RTL design and functional verification.
• Have hands-on experience in front-end IC design/verification.
• Expertise in Perl and Tcl is a plus.
• Should be able to work closely with RTL Designers and Backend Physical Design teams across multiple sites.
• Must have good communication & Analytical thinking skills.

职能类别： 大学/大专应届毕业生