职位描述和要求：

【Responsibilities】

1. ASIC design verification methodology research and development;

2. Verification system development and maintenance;

3. Verification flow and execution ownership.

4. Verification system buildup and debugging;

5. Function vector develop and debugging, coverage analysis and improvement;

6. Function modeling/monitor/assertion and script develop

【Requirements】

1. MS/PHD in Microelectronic, Computer Science, Communication, EE, Automation and related

2. Knowledge of digital circuit design and computer system architecture

3. Familiar with Verilog/VHDL, SystemVerilog and C/C++

4. Experience with simulator such as NC/VCS

5. Good team work; strong problem solving and debugging skills;

6. Good English communication skill.

7. Knowledge of Unix platform and csh. Perl or python and tcl programming is a plus

8. Knowledge of X86 architecture is a plus

9. Knowledge of UVM system is a plus